1. Field of the Invention
The present invention relates to a resistance changeable device used for a data transmission system having a plurality of data transmission channels, and more particularly to a resistance changeable device used for a receiving end device which is used for a data transmission system requiring of the adjustment of an input impedance. Also, the present invention relates to a resistance changeable device usable for a differential output circuit such as a low voltage differential signaling (LVDS) system which is used for a notebook-sized personal computer and is characterized by data transmission at high speed, low voltage and low noise.
2. Description of Related Art
FIG. 6 is a view of an equivalent circuit of a conventional data transmission system, and FIG. 7 is a view of an equivalent circuit of another conventional data transmission system. In FIG. 6 and FIG. 7, 1 indicates a transmission line formed of a single data bus, 2 indicates a transmitting end device, and 3 indicates a receiving end device. Also, 4 indicates a transmission line formed of two data buses, 5 indicates a transmitting end device, and 6 indicates a receiving end device in which noise is reduced by performing differential amplification.
FIG. 8 is a view of an equivalent circuit of a conventional data transmission system in which impedance matching is performed. In FIG. 8, 11 indicates a plurality of transmission lines formed of a plurality of data buses respectively, 12 indicates a transmitting end device, 13 indicates a receiving end device, and 14 indicates a termination resistor connected to each transmission line 11 on the outside of the corresponding receiving end device 13.
Next, operations of the conventional data transmission systems will be described below.
In general, in cases where the transmission delay time in the transmission line 1 or 4 is longer than a rise time or a fall time of a transmitted signal, the transmission line 1 or 4 is regarded as a distributed constant line, and it is required to consider influence of noise such as reflection of the transmitted signal. In particular, in case of a high speed data transmission system, the transmission delay time in a transmission line is often longer than a rise time or a fall time of a transmitted signal, and it is important to protect the data transmission system from noise such as reflection of the signal caused by the impedance mismatching in the transmission line.
Also, a termination resistor is generally used to obtain the impedance matching in the transmission line. As shown in FIG. 8, in cases where the impedance matching among an output impedance Z1 of the transmitting end device 12, a characteristic impedance Z0 of the transmission line 11 and a resistance value ZL of the termination resistor 14 is obtained, no reflection of the signal occurs fundamentally. In other words, it is important to match the resistance value ZL of the termination resistor 14 with the characteristic impedance Z0 of the transmission line 11.
However, in a general high speed data transmission system, a multi-bit bus such as an 8-bit bus or a 16-bit bus is often disposed as a plurality of data buses respectively connecting the transmitting end device 12 and the receiving end device 13. Therefore, in cases where a plurality of termination resistors 14 disposed on the outside of the receiving end device 13 are connected to all input terminals of the receiving end device 13 respectively, problems have arisen that the number of constituent elements disposed on a substrate (or a semiconductor chip), on which the receiving end device is disposed, is increased, the manufacturing cost of the data transmission system is increased and an element disposing area of the substrate is increased.
In contrast, there is a case where the termination resistors 14 are disposed on the inside of the receiving end device 13 to reduce both the manufacturing cost of the data transmission system and the element disposing area of the substrate. However, in this case, because it is difficult to uniformly form the termination resistors 14 in the actual manufacturing so as to set the termination resistors 14 to the same resistance value as each other, there is high probability that the impedance mismatching occurs between the transmitting end device 12 and the receiving end device 13. Also, in cases where the termination resistors 14 are disposed on the inside of the receiving end device 13, each termination resistor 14 is fixed to a resistance value near to a desired resistance value. Therefore, a problem has arisen that the receiving end device 13 having one termination resistor 14 cannot be used for another data transmission system in which a characteristic impedance of a transmission line differs from the characteristic impedance Z0 of the transmission line 11 originally connected to the receiving end device 13. Therefore, in the prior art, in a viewpoint of data transmission characteristics, it is advantageous that a plurality of termination resistors adjusted according to the characteristic impedances Z0 of the transmission line 11 respectively are disposed on the outside of the receiving end device 13.
An object of the present invention is to provide, with due consideration to the drawbacks of the conventional data transmission systems, a resistance changeable device in which a resistance value of a termination resistor disposed on the inside of a semiconductor chip is adjustable so as to reduce both a manufacturing cost of a data transmission system and an element disposing area of the semiconductor chip and so as to keep the impedance matching of the data transmission system to a degree of the impedance matching obtained on the assumption that the termination resistor is disposed on the outside of the semiconductor chip.
The object is achieved by the provision of a resistance changing device comprising a pull-up resistor unit having a plurality of resistive elements of which first ends are connected to a high electric potential source, a switching circuit unit having a plurality of switches of which first ends are connected to second ends of the resistive elements of the pull-up resistor unit respectively and second ends are connected to a signal input terminal, a mode switch of which a first end is connected to the signal input terminal and which is switched on in response to a significant mode signal input to a mode setting terminal and is switched off in response to an insignificant mode signal input to the mode setting terminal, a reference voltage producing circuit for producing a reference voltage, a voltage-to-current converting unit, which has an NMOS transistor having a drain connected to a second end of the mode switch, an external resistor disposed outside a chip and having both an end connected to a source of the NMOS transistor and another end connected to a low electric potential source and an operational amplifier having a first input terminal connected to the reference voltage producing circuit, a second input terminal connected to a node between the NMOS transistor and the external resistor and an output terminal connected to a gate of the NMOS transistor, for converting the reference voltage received by the operational amplifier from the reference voltage producing circuit into a current flowing through the NMOS transistor according to a resistance value of the external resistor, an analog-to-digital converting circuit for converting a node voltage at a node between the mode switch and the NMOS transistor of the voltage-to-current converting unit into a digital measured value code, an expected value holding unit for holding a digital expected value code denoting an expected value of a composite resistance of the pull-up resistor unit, a decoding circuit for producing a correction code according to both the digital measured value code obtained by the analog-to-digital converting circuit and the digital expected value code held by the expected value holding unit, a latch circuit for outputting the correction code produced by the decoding circuit in response to the significant mode signal input to the mode setting terminal and disregarding the correction code in response to the insignificant mode signal input to the mode setting terminal, and a selector circuit for performing an on-off control for each of the switches of the switching circuit unit according to the correction code output from the latch circuit so as to correct the composite resistance of the pull-up resistor unit to the expected value.
In the above configuration, a prescribed number of switches are initially turned on by the selector circuit. Thereafter, when a significant mode signal is input to the mode setting terminal, the mode switch is turned on, a current flows from the high electric potential source to the low electric potential source through resistor elements connected to the switches turned on, the mode switch, the NMOS transistor and the external resistor of the voltage-to-current converting unit, and a node voltage is applied to the node between the mode switch and the NMOS transistor of the voltage-to-current converting unit. The node voltage is converted into a digital measured value code by the analog-to-digital converting circuit, the digital measured value code is compared with the digital expected value code denoting an expected value of a composite resistance of the pull-up resistor unit by the decoding circuit to obtain an error code, the error code passes through the latch circuit, and each switch of the switching circuit unit is turned on or turned off according to the correction code by the selector circuit. Therefore, the composite resistance of the pull-up resistor unit functioning as a termination resistor is corrected to the expected value. Thereafter, when an insignificant mode signal is input to the mode setting terminal, the mode switch is turned off, and no correction code passes through the latch circuit. Therefore, the composite resistance of the pull-up resistor unit corrected is kept at the expected value.
Accordingly, because the pull-up resistor unit is disposed on the inside of the chip as a termination resistor, a manufacturing cost of a data transmission system and an element disposing area of the chip can be reduced.
Also, because the composite resistance of the pull-up resistor unit functioning as a termination resistor can be accurately set to the expected value of the composite resistance, the impedance matching of the data transmission system can be kept to a degree of the impedance matching obtained on the assumption that the termination resistor is disposed on the outside of the semiconductor chip.
Also, because the external resistor is disposed on the outside of the chip, the resistance value of the external resistor can be arbitrarily changed. Therefore, the resistance value of the termination resistor indicated by the composite resistance of the pull-up resistor unit can be easily adjusted.
Also, the resistive elements of the pull-up resistor unit can function as the termination resistor of a receiving end device.
The object is also achieved by the provision of a resistance changing device comprising a reference voltage producing circuit for producing a reference voltage, a voltage-to-current converting unit, which has an external resistor disposed outside a chip and having a first end connected to a high electric potential source, a PMOS transistor having a source connected to a second end of the external resistor and an operational amplifier having a first input terminal connected to a node between the PMOS transistor and the external resistor, a second input terminal connected to the reference voltage producing circuit, and an output terminal connected to a gate of the PMOS transistor, for converting the reference voltage received by the operational amplifier from the reference voltage producing circuit into a current flowing through the PMOS transistor according to a resistance value of the external resistor, a mode switch of which a first end is connected to a drain of the PMOS transistor of the voltage-to-current converting unit and a second end is connected to a signal input terminal and which is switched on in response to a significant mode signal input to a mode setting terminal and is switched off in response to an insignificant mode signal input to the mode setting terminal, a switching circuit unit having a plurality of switches of which first ends are connected to the signal input terminal, a pull-down resistor unit having a plurality of resistive elements of which first ends are connected to second ends of the switches of the switching circuit unit respectively and second ends are connected to a low electric potential source, an analog-to-digital converting circuit for converting a node voltage at a node between the mode switch and the PMOS transistor of the voltage-to-current converting unit into a digital measured value code, an expected value holding unit for holding a digital expected value code denoting an expected value of a composite resistance of the pull-down resistor unit, a decoding circuit for producing a correction code according to both the digital measured value code obtained by the analog-to-digital converting circuit and the digital expected value code held by the expected value holding unit, a latch circuit for outputting the correction code produced by the decoding circuit in response to the significant mode signal input to the mode setting terminal and disregarding the correction code in response to the insignificant mode signal input to the mode setting terminal, and a selector circuit for performing an on-off control for each of the switches of the switching circuit unit according to the correction code output from the latch circuit so as to correct the composite resistance of the pull-down resistor unit to the expected value.
In the above configuration, a prescribed number of switches are initially turned on by the selector circuit. Thereafter, when a significant mode signal is input to the mode setting terminal, the mode switch is turned on, a current flows from the high electric potential source to the low electric potential source through the external resistor and the PMOS transistor of the voltage-to-current converting unit, the mode switch and resistor elements connected to the switches turned on, and a node voltage is applied to the node between the mode switch and the PMOS transistor of the voltage-to-current converting unit. The node voltage is converted into a digital measured value code by the analog-to-digital converting circuit, the digital measured value code is compared with the digital expected value code denoting an expected value of a composite resistance of the pull-down resistor unit by the decoding circuit to obtain an error code, the error code passes through the latch circuit, and each switch of the switching circuit unit is turned on or turned off according to the correction code by the selector circuit. Therefore, the composite resistance of the pull-down resistor unit is corrected to the expected value. Thereafter, when an insignificant mode signal is input to the mode setting terminal, the mode switch is turned off, and no correction code passes through the latch circuit. Therefore, the composite resistance of the pull-down resistor unit corrected is kept at the expected value.
Accordingly, because the pull-down resistor unit is disposed on the inside of the chip as a termination resistor, a manufacturing cost of a data transmission system and an element disposing area of the chip can be reduced.
Also, because the composite resistance of the pull-down resistor unit functioning as a termination resistor can be accurately set to the expected value, the impedance matching of the data transmission system can be kept to a degree of the impedance matching obtained on the assumption that the termination resistor is disposed on the outside of the semiconductor chip.
Also, because the external resistor is disposed on the outside of the chip, the resistance value of the external resistor can be arbitrarily changed. Therefore, the resistance value of the termination resistor indicated by the composite resistance of the pull-down resistor unit can be easily adjusted.
Also, the resistive elements of the pull-down resistor unit can function as the termination resistor of a receiving end device.
It is preferred that the resistance changing device further comprises a replica circuit connected to a second signal input terminal and having the same configuration as a set of the pull-up resistor unit and the switching circuit unit, wherein the first end of the mode switch is connected to the second signal input terminal, and an on-off control for each of a plurality of switches of the replica circuit is performed by the selector circuit so as to correct a composite resistance of the replica circuit to an expected value.
Therefore, even though a plurality of data buses are connected with a receiving end device disposed on the inside of the chip to input a plurality of signals transmitted through the data buses to a plurality of signal input terminals of the receiving end device, a resistance value of the termination resistor indicated by the composite resistance of the pull-up resistor unit can be disposed for each data bus.
It is preferred that the resistance changing device further comprises a replica circuit connected to a second signal input terminal and having the same configuration as a set of the pull-down resistor unit and the switching circuit unit, wherein the second end of the mode switch is connected to the second signal input terminal, and an on-off control for each of a plurality of switches of the replica circuit is performed by the selector circuit so as to correct a composite resistance of the replica circuit to an expected value.
Therefore, even though a plurality of data buses are connected with a receiving end device disposed on the inside of the chip to input a plurality of signals transmitted through the data buses to a plurality of signal input terminals of the receiving end device, a resistance value of the termination resistor indicated by the composite resistance of the pull-down resistor unit can be disposed for each data bus.
It is also preferred that the resistive elements of the pull-up resistor unit are formed of a plurality of MOS transistors, and the MOS transistors turned on have resistances respectively.
Therefore, an area occupied by the pull-up resistor unit on the chip can be reduced.
It is also preferred that the resistive elements of the pull-down resistor unit are formed of a plurality of MOS transistors, and the MOS transistors turned on have resistances respectively.
Therefore, an area occupied by the pull-down resistor unit on the chip can be reduced.
It is also preferred that the expected value holding unit is formed of a register circuit, and the digital expected value code arbitrarily set is held in the register circuit.
Therefore, the composite resistance of the pull-up resistor unit can be changed to the expected value arbitrarily set as a termination resistance.
It is also preferred that the expected value holding unit is formed of a register circuit, and the digital expected value code arbitrarily set is held in the register circuit.
Therefore, the composite resistance of the pull-down resistor unit can be changed to the expected value arbitrarily set as a termination resistance.